Recursive design of self-timed Brent Kung timer adder

Recursive design of self-timed Brent Kung timer adder
Author(s):
Muthyla SukanyaRani, Atufa Rabia
Keywords:
Brent Kung (BK) Adder, Ripple Carry Adder, Power, Delay
Abstract
In IC design environment, the chip performance is influence by design environment, schematic and sizing parameter of the transistor. Therefore, this study is an attempt to investigate the performance of Recursive design of self-timed Brent Kung Parallel Prefix Adder.The operation is parallel for those bits that do not need any carry chain propagation. Thus, the design attains logarithmic performance over random operand conditions without any special speedup circuitry or look-ahead schema. A practical implementation is provided along with a completion detection unit. The implementation is regular and does not have any practical limitations of high fanouts. A high fan-in gate is required though but this is unavoidable for asynchronous logic and is managed by connecting the transistors in parallel.
Article Details
Unique Paper ID: 143956 Publication Volume & Issue: Volume 3, Issue 4 Page(s): 339 - 343
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