Acquisition and Tracking of IRNSS Receiver on MATLAB and Xilinx
Author(s):
Kishan Y. Rathod, Dr. Rajendrakumar D. Patel, Amit Chorasiya
Keywords:
Acquisition, IRNSS, MATLAB, Tracking & Xilinx
Abstract
The proposed research work aims to understand the IRNSS (Indian Regional Navigation Satellite System) as a hole and receiver in particular. The work focuses on implementing digital signal processing of Acquisition and Tracking blocks of the receiver on FPGA (Field Programmable Gate Array). Various techniques recently in use for Acquisition and Tracking was analysed from a performance point of view. The objective of the proposed research work is to contribute to the development of the commercialized IRNSS receiver, which must be cost effective with reasonably acceptable performance. The IRNSS receiver will be comprised of two major modules: 1) RF Front-End and 2) IF Signal Processing on FPGA. RF front-end should be comprised of two modules RF chain and ADC. RF chain is meant for receiving L5 (1176.45 MHz) and S (2492.028 MHz) band RF carrier signal from satellites and convert them into IF signal. ADC will convert Analog IF signal into Digital IF signal. The second module, IF signal processing on FPGA, is made up of various signal processing blocks such as Acquisition, Tracking, Sub Frame Identity, Ephemeris & Pseudo Range and User Position Calculation
Article Details
Unique Paper ID: 146309

Publication Volume & Issue: Volume 4, Issue 12

Page(s): 100 - 104
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