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@article{207423,
        author = {Sanjeev Goyal},
        title = {Advanced Fin-FET Semiconductor Technology for Energy-Efficient High-Performance Integrated Circuits},
        journal = {International Journal of Innovative Research in Technology},
        year = {2026},
        volume = {13},
        number = {3},
        pages = {694-702},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=207423},
        abstract = {Modern electronics, AI accelerators, and high-speed communication systems require semiconductor devices to deliver both high performance and low power consumption. Conventional planar Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) face fundamental physical limitations below the 22 nm node, including subthreshold leakage, short-channel effects (SCEs), drain-induced barrier lowering (DIBL), and threshold voltage instability. Fin Field-Effect Transistor (FinFET) technology resolves these issues through a three-dimensional, multi-gate channel structure that improves electrostatic gate control. This paper examines FinFET device physics, fabrication, and performance benchmarking against planar MOSFETs across key metrics: leakage current, subthreshold swing, power, switching speed, and scalability. Applications in microprocessors, AI accelerators, 5G systems, and cloud data centers are covered along with fabrication challenges and the roadmap toward Gate-All-Around (GAA) nanosheet transistors. Transfer and output characteristics plus multi-node scaling data are presented. Results show FinFETs reduce leakage by over 90%, achieve subthreshold swing near 60 mV/decade, and remain viable to sub-3 nm nodes, making FinFET the standard architecture for next-generation Very Large-Scale Integration (VLSI) systems.},
        keywords = {FinFET; Semiconductor Technology; MOSFET; Short-Channel Effects; VLSI; Integrated Circuits; Nanotechnology; Low Power Electronics; Gate-All-Around; Subthreshold Swing.},
        month = {August},
        }