SAFETY MECHANISM FOR FAULTS IN SRAM IN MULTICORE MICROCONTROLLER TO CHECK SAFE RAM FUNCTIONALITY
Author(s):
THEJASWINI K P, NEETHI M, SHAIK MOHAMMED YASEEN BASHA
Keywords:
Abstract
A transmission control unit (TCU) is one of the types of automotive control unit that is ECU which is used to control the gearing system automatically. This TCU plays a vital position in today’s cutting-edge automobile for automating the manual gearing system. In modern automatic transmission, the TCU uses sensors to fetch data from the automotive vehicle, and also from the electronic control unit (ECU), in order to calculate, how gear changing control in the vehicle to enhance the overall performance, shift quality and fuel consumption thus improving the sophistication in our daily lifestyles by upgrading to automatic gearing system from manual gearing system and improving the quality of automation. being this important, creating such a highly intelligent and also improved sophisticated control software for the TCU is also becoming challenging. Such system is mainly developed with micro controller which act as sensor, processor, and actuators. If an error or fault is occurring in microcontroller, then it will damage the performance of microcontroller, and which leads to the failure of cascade system which is in contact with the microcontroller. These types of failures can be avoided by adapting the standards created by functional safety ISO (26262). In this project, the different faults that can be occurred in general in ram memory and safety mechanism for those faults has been discussed and implemented. modern electronic control unit consist of many components. We should ensure the safety of all these components by assigning this with automotive safety integrity level. To make sure the safety, system methodologies followed are partitioning of memory for a different ASIL and developing entire software component according to ASIL depending on applications. The present paper gives info on configuration and reveal required hardware protection mechanism that are in built and additionally gives software program protection system for memory. For simulation work which we carried out, AURIX TC37X micro controller has been used which is from Infineon technology having 32-bit tri-core architecture.
Article Details
Unique Paper ID: 154917

Publication Volume & Issue: Volume 8, Issue 12

Page(s): 626 - 632
Article Preview & Download


Share This Article

Conference Alert

NCSST-2021

AICTE Sponsored National Conference on Smart Systems and Technologies

Last Date: 25th November 2021

SWEC- Management

LATEST INNOVATION’S AND FUTURE TRENDS IN MANAGEMENT

Last Date: 7th November 2021

Go To Issue



Call For Paper

Volume 8 Issue 4

Last Date 25 September 2021

About Us

IJIRT.org enables door in research by providing high quality research articles in open access market.

Send us any query related to your research on editor@ijirt.org

Social Media

Google Verified Reviews

Contact Details

Telephone:6351679790
Email: editor@ijirt.org
Website: ijirt.org

Policies