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@article{155744,
        author = {Vannekuti Jahnavi and Dr.U.Yedukondalu },
        title = {HIGH THROUGHPUT AND DENSITY OPTIMIZED EFFICIENT MULTI OPERAND ADDER},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {9},
        number = {2},
        pages = {1835-1839},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=155744},
        abstract = {Basic mathematical operations like addition subtraction, multiplication and division operations are performed by many digital devices including microprocessors and digital signal processors. Even used for complicated calculations very efficiently. Here an efficient adder circuit is implemented that revolves around reducing the cost to propagate the carry among consecutive bit positions. Consequently, a novel high speed area efficient adder architecture is implemented using bitwise pre-calculations that followed by carry prefix logic to perform three operand binary addition that utilizes less area, power, and delay. Additionally, this article enhances uses modified carry bypass adder for reducing density and latency limitations. This also modifies carry skip adder that presents a simple and low complicated carry skip logic for reducing parameters limitations.},
        keywords = {Parallel Prefix, Brent – Kung, Carry save addition, pre-compute bitwise addition followed by carry prefix, Carry skip addition.},
        month = {},
        }