Author Login IJIRT Partner Network (IPN) Login

A Verilog HDL Based Approach For Vending Machine Design

  • Unique Paper ID: 160848
  • Volume: 10
  • Issue: 1
  • PageNo: 1470-1472
  • Abstract:
  • Finite State Machine (FSM) modelling is the most important component of designing the proposed model since it decreases the hardware. The Mealy Machine pretend was used to pretend a four- state process (stoner selection, staying for plutocrat insertion, product delivery, and servicing) in this work. The suggested model is estimated using the Spartan 3 development board, and its performance is compared to that of a CMOS-based machine. When a coin is inserted, vending machines distribute little quantities of various things. These machines may be created in a variety of ways utilising microcontrollers and FPGA boards. In this research, we suggested an efficient approach for implementing a vending machine on an FPGA board. Because FPGA-based vending devices respond quickly and consume less power than microcontroller-based vending machines
Download article email to a friend

Cite This Article

  • ISSN: 2349-6002
  • Volume: 10
  • Issue: 1
  • PageNo: 1470-1472

A Verilog HDL Based Approach For Vending Machine Design

Related Articles

Impact Factor
8.01 (Year 2024)
UGC Approved
Journal no 47859

Join Our IPN

IJIRT Partner Network

Submit your research paper and those of your network (friends, colleagues, or peers) through your IPN account, and receive 800 INR for each paper that gets published.

Join Now

Latest Publication

Archive

View More

Recent Conferences

NCSEM 2024

National Conference on Sustainable Engineering and Management - 2024 Last Date: 15th March 2024

Submit inquiry