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@article{160848,
        author = {Barla Varsha and Dakoju Rikithaa Sai and Guduru Sai Shirisha and Jinaga Suresh},
        title = {A Verilog HDL Based Approach For Vending Machine Design},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {10},
        number = {1},
        pages = {1470-1472},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=160848},
        abstract = {Finite State Machine (FSM) modelling is the most important component of designing the proposed model since it decreases the hardware. The Mealy Machine pretend was used to pretend a four- state process (stoner selection, staying for plutocrat insertion, product delivery, and servicing) in this work. The suggested model is estimated using the Spartan 3 development board, and its performance is compared to that of a CMOS-based machine. When a coin is inserted, vending machines distribute little quantities of various things. These machines may be created in a variety of ways utilising microcontrollers and FPGA boards. In this research, we suggested an efficient approach for implementing a vending machine on an FPGA board. Because FPGA-based vending devices respond quickly and consume less power than microcontroller-based vending machines},
        keywords = {FSM, Mealy machine, Vending Machine, CMOS, Microcontroller, FPGA},
        month = {},
        }