A Verilog HDL Based Approach For Vending Machine Design
Barla Varsha, Dakoju Rikithaa Sai, Guduru Sai Shirisha, Jinaga Suresh
FSM, Mealy machine, Vending Machine, CMOS, Microcontroller, FPGA
Finite State Machine (FSM) modelling is the most important component of designing the proposed model since it decreases the hardware. The Mealy Machine pretend was used to pretend a four- state process (stoner selection, staying for plutocrat insertion, product delivery, and servicing) in this work. The suggested model is estimated using the Spartan 3 development board, and its performance is compared to that of a CMOS-based machine. When a coin is inserted, vending machines distribute little quantities of various things. These machines may be created in a variety of ways utilising microcontrollers and FPGA boards. In this research, we suggested an efficient approach for implementing a vending machine on an FPGA board. Because FPGA-based vending devices respond quickly and consume less power than microcontroller-based vending machines
Article Details
Unique Paper ID: 160848

Publication Volume & Issue: Volume 10, Issue 1

Page(s): 1470 - 1472
Article Preview & Download

Share This Article

Join our RMS

Conference Alert

NCSEM 2024

National Conference on Sustainable Engineering and Management - 2024

Last Date: 15th March 2024

Call For Paper

Volume 11 Issue 1

Last Date for paper submitting for Latest Issue is 25 June 2024

About Us

IJIRT.org enables door in research by providing high quality research articles in open access market.

Send us any query related to your research on editor@ijirt.org

Social Media

Google Verified Reviews