Copyright © 2026 Authors retain the copyright of this article. This article is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

@article{146962,
        author = {Ashwini L Kanth and Amaresh S K and Dr. Shiva S Yellampalli},
        title = {Design and Implementation of Packet Switched NoC Fabric using YX Algorithm},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {5},
        number = {2},
        pages = {568-572},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=146962},
        abstract = {Nowadays the idea of using network on chip (NoC) as viable on chip communication fabrics for the future multiprocessor system-on-chip (MPSoCs) and system on chip (SoC). The scalability and parallelism properties made NoC efficient than others. Bus based on-chip communication architectures suffers from scalability and speed,whereas NoC uses layered data transfer. In NoC routing algorithm is responsible for routing data from source to destination. In this paper designed packet switched NoC with XYis proposed in order to avoid the deadlocks in network.},
        keywords = {Network On chip (NoC), System on Chip (SoC), First in First OUT (FIFO).},
        month = {},
        }