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@article{161080,
        author = {Muralikrishna V. S and M. Joselin Kavitha},
        title = {A HIGH-SPEED, AREA-EFFICIENT TRANSFER METHOD USING A REVERSE CARRY PROPAGATE ADDER},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {10},
        number = {2},
        pages = {554-559},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=161080},
        abstract = {The most important component of any electronic device has historically been the arithmetic and logic unit. An efficient algorithmic function, such as addition and multiplication, which is required for an arithmetic as well as logic unit to be significant in the current improvement. For performing modular arithmetic in several cryptography and pseudorandom bit generator (PRBG) algorithms, the three-operand binary adder is the fundamental functional unit. In this paper, this study purposes a reverse carry propagate adder. A carry input signal is more important than the carry output signal because, in the RCPA structure, the carry signal flows counter-clockwise from the most significant bit to the least significant bit. In the presence of delay changes, this carry propagation technique results in greater stability. Three implementations of the reverse carry propagate full-adder cell with different delay, power, energy, and accuracy levels are introduced by this study. As a result, it continues as one of the greatest options for creating huge arithmetic circuits with little increase in area and minimal power and energy usage.},
        keywords = {Pseudorandom bit generator, RCPA, three-operand binary adder, reverse carry propagate adder.},
        month = {},
        }