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@article{198742,
        author = {E. Prabhakar and N. Hari Raj Goud and M. Varshitha and M. venu Sagar and MD. Nawaaz},
        title = {Design and Simulation of an Effecient DMA Controller with Error Detection for Embedded Systems},
        journal = {International Journal of Innovative Research in Technology},
        year = {2026},
        volume = {12},
        number = {11},
        pages = {9964-9967},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=198742},
        abstract = {This paper presents the design and simulation of an efficient DMA Controller with error detection for embedded systems. The Direct Memory Access (DMA) controller enables efficient data transfer without continuous CPU involvement. Conventional DMA systems are limited in handling non-contiguous memory and require repeated processor intervention. This paper presents a Scatter-Gather DMA controller that uses a descriptor-based approach to manage multiple data blocks automatically. The proposed design reduces CPU overhead, improves throughput, and supports efficient data transfer in modern systems.},
        keywords = {DMA Controller, Scatter-Gather, ECC, RTL Design, Embedded Systems, Data Transfer.},
        month = {April},
        }