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@article{206522,
        author = {Yashaswini M and Shilpa B M and Drakshayini K R and K Shreya and Sushmitha},
        title = {Energy-Efficient FPGA-Based CNN Accelerator for Real-Time Edge Inferences},
        journal = {International Journal of Innovative Research in Technology},
        year = {2026},
        volume = {13},
        number = {2},
        pages = {2115-2117},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=206522},
        abstract = {The increasing demand for real-time artificial intelligence applications has driven the need for efficient hardware acceleration of Convolutional Neural Networks (CNNs), particularly in edge computing environments. However, the high computational complexity and energy requirements of CNN models limit their deployment on resource-constrained platforms. Field-Programmable Gate Arrays (FPGAs) have emerged as a promising solution due to their reconfigurability and parallel processing capabilities. This paper presents a survey of recent FPGA-based CNN accelerators with a focus on architectural optimizations, dataflow scheduling, precision reduction, and reconfigurable designs. The study analyzes various approaches aimed at improving performance, reducing power consumption, and enhancing hardware utilization. The review highlights key techniques such as depthwise separable convolutions, adaptive dataflow mechanisms, runtime reconfiguration, and model compression strategies. Finally, the paper identifies existing limitations and discusses future directions for developing more efficient and scalable FPGA-based CNN accelerators for edge inference applications.},
        keywords = {FPGA, CNN Accelerator, Edge Computing, Deep Learning, Energy Efficiency, Reconfigurable Architecture},
        month = {July},
        }