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@article{208776,
        author = {G.kethan Kumar and Dr. B. Anuradha},
        title = {FPGA-Based Low-Power Architecture for Real-Time Arrhythmia Detection Using Fixed-Length Segmentation},
        journal = {International Journal of Innovative Research in Technology},
        year = {2026},
        volume = {13},
        number = {4},
        pages = {2755-2763},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=208776},
        abstract = {Data processing and low power consumption are essential for monitoring heart signals in real time[5],[7]. This project is a prototype of a real-time electrocardiogram (ECG) monitoring application for the Xilinx PYNQ-Z2 System-on-Chip (SoC) board[5],[10]. The board's built-in 12-bit ADC converts signals from the heart[4],[6], which are picked up by using an AD8232 sensor, into digital values. High speed, high stability baseline wander removal[7],[9], electrical noise filtering and other heavy signal cleaning jobs are executed directly in the FPGA, which is a 25-tap FIR filter. The cleaned signal is then passed on to the ARM processor on board where the heartbeats are detected and the relevant points of P, Q, R, S and T waves are identified within a 5 second window in less than 2 milliseconds [1],[8]. During the 89.7-second continuous live test, the system was able to accurately track the heartbeats at 75 bpm (800ms intervals) at 99.68% sensitivity and 99.74% positive predictivity [2],[3],[10]. It consumes only 14.2% of logic resources, 3% of memory, and consumes approximately 160 mW of power, and it is considered as a working, low-power hardware prototype [4],[7],[10].},
        keywords = {Electrocardiogram (ECG), FPGA, Hardware Prototype, Low Power, PYNQ-Z2 SoC , Real-Time Detection,},
        month = {September},
        }