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@article{145330,
        author = {Noor Ul Abedin},
        title = {Parallel CMOS Implementation of NOR Logic in both Pull-Up and Pull-Down Networks},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {4},
        number = {9},
        pages = {187-190},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=145330},
        abstract = {Aware to that the implementation of CMOS logic based on NAND and NOR logic principles of pull-up and pull-down combination of transistors, this work shows how by using both the combinations of      pull-up and pull-down transistors in parallel too we can realize a NOR logic. This is illustrated with the help of using DSCH software.},
        keywords = {CMOS, NOR, Pull-up, Pull-down, Parallel and DSCH software},
        month = {},
        }