|DESIGN LOW LATENCY-POWER ADDERS USING REVERSABLE LOGIC|
|JYOTHI, J.VENKATA LAKSHMI|
|Cite This Article:|
DESIGN LOW LATENCY-POWER ADDERS USING REVERSABLE LOGIC, International Journal of Innovative Research in Technology(www.ijirt.org) ,ISSN: 2349-6002 ,Volume 5 ,Issue 7 ,Page(s):66-69 ,December 2018 ,Available :IJIRT147324_PAPER.pdf
|Reversible common sense, quantum fee, rubbish outputs.|
|Reversible logic has presented itself as a distinguished technology which performs an vital position in Quantum Computing. Quantum computing gadgets theoretically perform at ultra-excessive velocity and eat infinitesimally less energy. Research did in this mission goals to make use of the concept of reversible logic to break the conventional pace-electricity trade-off, thereby getting a step closer to comprehend Quantum computing gadgets. To authenticate this research, numerous combinational and sequential circuits are applied which include N-bit Ripple-convey Adder using Reversible gates. The energy and speed parameters for the circuits were indicated, and in comparison with their traditional non-reversible counterparts. The comparative statistical study proves that circuits employing Reversible good judgment as a result are quicker and energy green.|
|Unique Paper ID: 147324|
Publication Volume & Issue: Volume 5, Issue 7
Page(s): 66 - 69
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