Microcontroller Based Testing of Digital IP-Core
Author(s):
Shubham Gupta , Shripad G. Desai
Keywords:
Abstract
Testing core-based System on Chip [1] is a challenge for the test engineers. To test the complete SOC at one time with maximum fault coverage, test engineers prefer to test each IP-core separately. At speed testing using external testers is more expensive because of gigahertz processor. The purpose of this paper is to develop cost efficient and flexible test methodology for testing digital IP-cores [2]. The prominent feature of the approach is to use microcontroller to test IP-core. The novel feature is that there is no need of test pattern generator and output response analyzer as microcontroller performs the function of both. This approach has various advantages such as at speed testing, low cost, less area overhead and greater flexibility since most of the testing process is based on software.
Article Details
Unique Paper ID: 150565

Publication Volume & Issue: Volume 7, Issue 7

Page(s): 231 - 236
Article Preview & Download


Share This Article

Go To Issue



Call For Paper

Volume 7 Issue 9

Last Date 25 February 2020

About Us

IJIRT.org enables door in research by providing high quality research articles in open access market.

Send us any query related to your research on editor@ijirt.org

Social Media

Google Verified Reviews

Contact Details

Telephone:6351679790
Email: editor@ijirt.org
Website: ijirt.org

Policies