DESIGN OF COMPARATOR USING DIFFERENT LOGIC STYLES OF FULL ADDER

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ISSN: 2349-6002 ESTD Year: 2014

UGC approved journal no 47859

DESIGN OF COMPARATOR USING DIFFERENT LOGIC STYLES OF FULL ADDER
Author(s):
K Tharun Teja, C. Satya PratikshReddy, Chinthareddy Sri Sai Ravali
Keywords:
Full Adder, Comparator, Inverter, Half Adder, XOR, MUX.
Abstract
In this paper, a new design of comparator is described with the help of Full adders which are the integrated blocks of an ALU in this 21st century and ALU is a basic functional unit of the Microprocessor and Digital Signal Processing. In the world of technology, it has become very essential to develop new design methodologies to reduce the power consumption. In this paper,comparator is developed using various design styles of full adder. We have also calculated and compared the power consumption by different logic styles implemented.
Article Details
Unique Paper ID: 142633 Publication Volume & Issue: Volume 2, Issue 5 Page(s): 78 - 81
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