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COMPARATIVE ANALYSIS OF NAND GATE AND D FLIP-FLOP IN TERMS OF DELAY AND POWER

  • Unique Paper ID: 154712
  • Volume: 8
  • Issue: 12
  • PageNo: 143-151
  • Abstract:
  • The NAND gate is the highest priority gate in VLSI industry and D Flip-Flop is the basic element in shift register. The NAND gate and D Flip-Flop are implemented in different technologies like CMOS (180nm, 90nm, 45nm) technology and FINFET (18nm) technology. This work compares NAND gate as well as D Flip-Flop in various technologies in terms of delay and power. The Cadence tool is the leader of VLSI industry. This Cadence tool is used to implement the NAND gate and D flip flop. The simulation results were performed through Cadence Virtuoso environment at temperature 27 °C.
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Cite This Article

  • ISSN: 2349-6002
  • Volume: 8
  • Issue: 12
  • PageNo: 143-151

COMPARATIVE ANALYSIS OF NAND GATE AND D FLIP-FLOP IN TERMS OF DELAY AND POWER

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8.01 (Year 2024)
UGC Approved
Journal no 47859

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