REVIEW OF 2X2 VEDIC MULTIPLIER USING VARIOUS FULL ADDERS

REVIEW OF 2X2 VEDIC MULTIPLIER USING VARIOUS FULL ADDERS
Author(s):
Dr.V.Bindhu, V.Indhu
Keywords:
Nikhilam Navatascaramam Dasatah, Vedic Sutra, Adders, VLSI Design, DSP.
Abstract
The complexity of the chip is increasing as the advances in VLSI technology leads to accumulation of more and more devices on the single chip. Due to this high density of the chip, the power dissipation of the chip also gets increases demanding in the low power CMOS VLSI designs. Multiplication is one of the basic arithmetic operations in digital computer system and digital signal processor. In a typical scientific program 8.72% of all instructions are multiplies.
Article Details
Unique Paper ID: 160119 Publication Volume & Issue: Volume 9, Issue 12 Page(s): 1200 - 1203
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