Design and implementation of reconfigurable placement technique in soc.
Author(s):
N.ABISHA, Mr.R Ramesh.,M.E.,
Keywords:
GPU,GP,LG, NVIDIA Tesla V100 GPU, Pytorch
Abstract
One of the most crucial processes for design closure is placement for very-large-scale integrated (VLSI) circuits. By equating the analytical placement problem to the process of training a neural network, we provide a revolutionary GPU-accelerated placement framework called DREAMPlace. DREAMPlace, which is built on top of the widely used deep learning framework PyTorch, can outperform the state-of-the-art multithreaded placer RePlAce in terms of global placement speed without sacrificing quality by about 40 percent. We think that our effort will pave the way for tackling old EDA issues using modern hardware and software for AI.
Article Details
Unique Paper ID: 161217

Publication Volume & Issue: Volume 10, Issue 2

Page(s): 954 - 960
Article Preview & Download


Share This Article

Conference Alert

NCSST-2023

AICTE Sponsored National Conference on Smart Systems and Technologies

Last Date: 25th November 2023

SWEC- Management

LATEST INNOVATION’S AND FUTURE TRENDS IN MANAGEMENT

Last Date: 7th November 2023

Go To Issue



Call For Paper

Volume 10 Issue 1

Last Date for paper submitting for March Issue is 25 June 2023

About Us

IJIRT.org enables door in research by providing high quality research articles in open access market.

Send us any query related to your research on editor@ijirt.org

Social Media

Google Verified Reviews