• ISSN: 2349-6002
  • UGC Approved Journal No 47859

ROUNDING BASED APPROXIMATION MULTIPLIER FOR HIGH-SPEED YET ENERGY EFFICIENT DIGITAL SIGNAL PROCESSING

  • Unique Paper ID: 168137
  • Volume: 11
  • Issue: 4
  • PageNo: 1413-1417
  • Abstract:
  • In digital signal processing, multiplication is a critical fundamental arithmetic operation. The design of an approximation multiplier looks to be a potential option for many error-resilient applications to lower the power consumption of an embedded system. Applying the approximation to the arithmetic units can be performed at different design abstraction levels including circuit, logic, and architecture levels, as well as algorithm and software layers. The approximation may be performed using different techniques such as allowing some timing violations (e.g., voltage over scaling or overclocking) and function approximation methods (e.g., modifying the Boolean function of a circuit). In the category of function approximation methods, a number of approximating arithmetic building blocks, such as adders and multipliers, at different design levels have been suggested. In this work, we focus on proposing a high speed low power/energy yet approximate multiplier appropriate for error resilient DSP applications. The proposed approximate multiplier, which is also area efficient, is constructed by modifying the conventional multiplication approach at the algorithm level assuming rounded input values. We call this rounding-based approximate (RoBA) multiplier. The proposed multiplication approach is applicable to both signed and unsigned multiplications for which three optimized architectures are presented.

Cite This Article

  • ISSN: 2349-6002
  • Volume: 11
  • Issue: 4
  • PageNo: 1413-1417

ROUNDING BASED APPROXIMATION MULTIPLIER FOR HIGH-SPEED YET ENERGY EFFICIENT DIGITAL SIGNAL PROCESSING

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