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@article{177609,
        author = {D.Vandana and S.Prakash},
        title = {A HYBRID PWM METHOD FOR CAPACITOR VOLTAGE BALANCING TO ENHANCE T-TYPE NPC INVERTER PERFORMANCE},
        journal = {International Journal of Innovative Research in Technology},
        year = {2025},
        volume = {11},
        number = {12},
        pages = {1037-1048},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=177609},
        abstract = {Recent years have seen a surge in research into grid-tied multilevel inverters (MLIs) fed by solar photovoltaic (PV) because of their unique characteristics in comparison to two-level voltage source inverters (VSIs). The reduction of total harmonic distortion (THD), dc-link voltage imbalance problems, power loss reduction, and thermal stress mitigation are all difficult aspects of maintaining the power quality of MLIs, and they are all greatly impacted by the pulse width modulation (PWM) technique.
A modified hybrid PWM approach that includes a modified modulating signal and a modified carrier signal is presented in this study to address the aforementioned power quality issues. The suggested and current PWM approaches are compared utilizing a variety of modulation index modifications and under various circumstances. For the power quality evaluation a grid-tied, three-phase, three-level T-type neutral point clamped (NPC) inverter is used. Compared to current PWM techniques, the suggested hybrid PWM delivers a lower output line voltage THD of 25.57% and a peak-to-peak dc-link capacitor voltage difference of 11.8 V. Additionally, the suggested hybrid PWM technique offers less thermal stress than current PWM systems by lowering the power switches' switching and conduction losses.
MATLAB/Simulink and PLECS simulation environments are used to compare the suggested hybrid PWM approach with the current one. A smaller-scale prototype created in our research lab is used to further validate the suggested hybrid PWM approach.},
        keywords = {T-type neutral point clamped inverters, multilevel inverters, voltage source inverters, dc-link voltage imbalance, pulse width modulation, and total harmonic distortion.},
        month = {May},
        }