An Enactmentof Interconnect Circuit Techniquesfor Energy Efficient on-Chip Interconnects

An Enactmentof Interconnect Circuit Techniquesfor Energy Efficient on-Chip Interconnects
Author(s):
Bukya Balaji
Keywords:
Interconnect, repeaters, wire, Current mode, differentialsignaling, clamped bit line Sense Amplifier.
Abstract
This paper presents a relative study ondifferent interconnect circuit techniques for on chipinterconnects. We have related different circuit structure byemploying on RC and RLC interconnects. In this delay benefit forcurrent sensing rises with an increase in wire width. Contrastingrepeaters, current sensing does not require placement of buffersalong the wire and it eliminates any placement constraints. Outof all these techniques a differential RLC current mode signalingcircuit insertion has offered the less amount of energy.
Article Details
Unique Paper ID: 144513 Publication Volume & Issue: Volume 2, Issue 2 Page(s): 273 - 277
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