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Analysis of power quality issues with interline power flow controller for IEEE 14 bus system

  • Unique Paper ID: 152873
  • Volume: 8
  • Issue: 4
  • PageNo: 745-752
  • Abstract:
  • This work involves the design of an IEEE 14 bus system with efficient FACTS device i.e., interline power flow controller (IPFC) using back to back connected three level inverter. The interline power flow controller with the PID controller aims to provide gating signals for the voltage source converters. An IEEE 14 bus system has been designed for the ensuring the operation of IPFC. The IEEE systems have been considered and affected by faults and determination of the optimal location of IPFC by conducting load flow analysis has been conducted. A Newton Raphson has been considered for conducting load flow analysis. This research work was conducted considering various faults like LLLG, LLG, LG faults for an IEEE 14 bus system. The performance comparison of an interline power flow controller and power system stabilizer for various faults has been analyzed considering an IEEE 14 bus system. All the components of the research work are designed using MATLAB simulink and the results are verified.
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Cite This Article

  • ISSN: 2349-6002
  • Volume: 8
  • Issue: 4
  • PageNo: 745-752

Analysis of power quality issues with interline power flow controller for IEEE 14 bus system

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