Ultra-Low-Power and Area- Efficient Design of a Weighted Pseudorandom Test-Pattern Generator for BIST Architecture

Ultra-Low-Power and Area- Efficient Design of a Weighted Pseudorandom Test-Pattern Generator for BIST Architecture
Author(s):
Anam, Dr. Manju Devi
Keywords:
BIST, TPG, Genus
Abstract
A test pattern generator generates a pseudorandom test pattern that can be weighted to reduce the fault coverage in a built-in self-test. The objective of this paper is to propose a new weighted TPG for a scan-based BIST architecture. The motivation of this work is to generate efficient weighted patterns for enabling scan chains with reduced power consumption and area. Additionally, the pseudo-primary seed of TPG is maximized to obtain a considerable length in the weighted pseudorandom patterns. The maximum- length weighted patterns are executed by assigning separate weights to the specific scan chains using a weight-enabled clock.
Article Details
Unique Paper ID: 156744 Publication Volume & Issue: Volume 9, Issue 4 Page(s): 614 - 619
Article Preview & Download

Share This Article

NCSEM 2024

National Conference on Sustainable Engineering and Management - 2024

Last Date: 15th March 2024

IJIRT.org enables door in research by providing high quality research articles in open access market.

Send us any query related to your research on editor@ijirt.org