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High Speed True Random Number Generator using Meta stability with Clock Managers

  • Unique Paper ID: 165283
  • Volume: 11
  • Issue: 1
  • PageNo: 941-945
  • Abstract:
  • This paper introduces an innovative method for constructing a True Random Number Generator (TRNG) tailored specifically for Field Programmable Gate Array (FPGA)-based digital systems. TRNGs are pivotal in ensuring the security of various applications, particularly within digital environments. The proposed technique harnesses the dynamic capabilities of Digital Clock Manager (DCM) hardware primitives to regulate the phase shift between clock signals. By exploiting the phenomenon of metastability in flip-flops (FFs), the system effectively generates random numbers of high quality. This auto-tuning mechanism not only simplifies the design process of TRNGs but also fortifies the security of FPGA-based systems by furnishing a reliable source of randomness for cryptographic task.
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  • ISSN: 2349-6002
  • Volume: 11
  • Issue: 1
  • PageNo: 941-945

High Speed True Random Number Generator using Meta stability with Clock Managers

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