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@article{142633,
        author = {K Tharun Teja and C. Satya PratikshReddy and Chinthareddy Sri Sai Ravali},
        title = {DESIGN OF COMPARATOR USING DIFFERENT LOGIC STYLES OF FULL ADDER},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {2},
        number = {5},
        pages = {78-81},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=142633},
        abstract = {In this paper, a new design of comparator is described with the help of Full adders which are the integrated blocks of an ALU in this 21st century and ALU is a basic functional unit of the Microprocessor and Digital Signal Processing. In the world of technology, it has become very essential to develop new design methodologies to reduce the power consumption. In this paper,comparator is developed using various design styles of full adder. We have also calculated and compared the power consumption by different logic styles implemented.},
        keywords = {Full Adder, Comparator, Inverter, Half Adder, XOR, MUX.},
        month = {},
        }