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@article{144115,
        author = {VINAYKUMAR ANKIREDDY and SREEKANTH BAIRAGONI},
        title = {LEAKAGE CURRENT CONTROL USING FULL ADDER},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {3},
        number = {6},
        pages = {121-125},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=144115},
        abstract = {The commonly used leakage power suppression technique in integrated circuits is power/grounded gating techniques which is also known as multi-threshold CMOS technique. When an MTCMOS circuit block transitions from sleep mode to active mode, there will be production of significant power and ground distribution network noise.             Mainly, by using full adders, the calculation of leakage current are made easy. By separating the functionality of a circuit into independent, interchangeable modules, it is necessary to executes only one aspect of desired functionality. This improves dynamic nature of design in real time applications. It makes easier for fault detection and malfunctioning of in circuit.},
        keywords = {Cmos, Fulladder, Leakage Current, Pmos, Nmos},
        month = {},
        }