Copyright © 2026 Authors retain the copyright of this article. This article is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

@article{177837,
        author = {Dr. A. Vikas and M. Soujanya and K. Prashanth and M. Datha Sai},
        title = {DESIGN AND PERFORMANCE ANALYSIS OF VOLTAGE CONTROLLED OSCILLATOR},
        journal = {International Journal of Innovative Research in Technology},
        year = {2025},
        volume = {11},
        number = {12},
        pages = {1680-1683},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=177837},
        abstract = {This paper presents the design and performance analysis of a CMOS Voltage-Controlled Oscillator (VCO) implemented using Cadence Virtuoso with the GPDK 90nm technology node. The VCO is a critical component in phase - locked loops (PLLS), and RF communication systems, requiring high- frequency stability and. In this work LC-Cross coupled VCO was employed to achieve compact design. The fundamental operation of VCO involves converting the input voltage into a corresponding frequency output allowing the dynamic frequency adjustments based on control voltage. The analysis focuses on optimizing the VCO’s parameters to achieve desired metrics, such as Stability, Linearity while ensuring minimal power consumption. The results validate the effectiveness of the GPDK 90nm process for high-frequency analog design and establish a baseline for future optimizations in VCO architectures.},
        keywords = {CMOS, CADENCE VIRTUOSO, LINEARITY POWER CONSUMPTION, STABILITY and VCO.},
        month = {May},
        }