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@article{178757,
        author = {CH. SWAPNA and K.MURALIDHAR and K.SRIKANTH and G.RAGHAVENDRA},
        title = {TO DESIGN OF LOW POWER WIDE RANGEVOLTAGE LEVEL SHIFTER USING CMOS TECHNOLOGY},
        journal = {International Journal of Innovative Research in Technology},
        year = {2025},
        volume = {11},
        number = {12},
        pages = {5208-5213},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=178757},
        abstract = {The Paper introduces an ultra-low leakage, high-speed level shifter capable of wide-range voltage and frequency conversion. It uses leakage shutoff transistors to eliminate static current during standby, significantly reducing power consumption. A low-threshold transistor in the pull-down path enables faster falling edges, while voltage hysteresis transistors enhance the pull-up network for quick and complete charging of internal nodes, solving swing issues and improving performance. Designed using the Mentor Tanner 16 nm process, the level shifter demonstrates efficient operation with ultra-low power consumption when converting voltages from 0.3 V input to over 1.2 V output. It achieves minimal propagation delay and low energy per transition, supporting a broad conversion range from 0.13 V to above 1.2 V. Overall, the design ensures energy efficiency and high-speed operation across varying voltage levels.},
        keywords = {Level Shifter, Ultra-Low Leakage Voltage Conversion, Fast Transition, Low-Threshold Transistor, Power Efficiency, Wide Voltage Range},
        month = {May},
        }