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@article{191844,
        author = {Dr. Deependra Rathore and Dr. Rahul Gedam and Ms. Shweta Yadav},
        title = {Multilevel Inverter Topology with Reduced Switch Count Using Python-Based Simulation},
        journal = {International Journal of Innovative Research in Technology},
        year = {2026},
        volume = {12},
        number = {8},
        pages = {8275-8279},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=191844},
        abstract = {Multilevel inverters (MLIs) have become an essential power electronic interface in renewable energy systems, industrial motor drives, and medium- to high-voltage applications. Although conventional MLI topologies provide superior waveform quality, their practical deployment is often limited by increased switch count, complex control requirements, and higher system cost. This paper presents a comprehensive investigation of a reduced switch count multilevel inverter topology analyzed using a Python-based numerical simulation framework. A five-level output voltage waveform is synthesized using simplified switching logic, and its harmonic performance is evaluated using Fast Fourier Transform (FFT) and Total Harmonic Distortion (THD) analysis. An LC output filter is designed and implemented to improve waveform quality. Extensive simulation results, comparative analysis with conventional topologies, and discussion on scalability, losses, and reliability are presented. The proposed approach demonstrates that reduced switch count MLIs can achieve acceptable power quality with lower hardware complexity while leveraging open-source simulation tools for reproducible research.},
        keywords = {Multilevel inverter, reduced switch count, Python simulation, harmonic analysis, FFT, THD, LC filter.},
        month = {January},
        }