Low-Latency Edge-Cloud FPGA Architecture for Intelligent Traffic Signal Control Using Real-Time Video Analytics and Environmental Sensing

  • Unique Paper ID: 194968
  • Volume: 12
  • Issue: 10
  • PageNo: 6346-6352
  • Abstract:
  • Urban traffic congestion and increasing vehicular emissions have become major challenges in modern cities. Traditional traffic signal systems operate on fixed timing schedules, which fail to adapt to real- time traffic conditions, resulting in delays, fuel wastage, and increased pollution levels. This paper presents a low-latency intelligent traffic control system based on an Edge-Cloud FPGA architecture. The system integrates an Artix-7 FPGA-based edge board with a Raspberry Pi, along with multiple sensors including ultrasonic sensors, gas sensors, and a cam- era module for real-time monitoring and decision-making. The FPGA performs high-speed parallel processing of sensor data to dynamically control traffic signals, while the Raspberry Pi utilizes image processing techniques to detect emergency vehicles and prioritize their movement. The ultrasonic sensors ensure pedestrian safety by detecting zebra crossing violations, and the gas sensor continuously monitors carbon monoxide (CO) levels to generate pollution alerts. By combining edge computing with intelligent sensing and real- time analytics, the proposed system improves traffic flow, enhances safety, reduces environmental impact, and provides a scalable solution for smart city traffic management.

Copyright & License

Copyright © 2026 Authors retain the copyright of this article. This article is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

BibTeX

@article{194968,
        author = {Meda Poojitha and Kunduru Akhila and Narala Sasi Ganga and Kumba Keziya Rani},
        title = {Low-Latency Edge-Cloud FPGA Architecture for Intelligent Traffic Signal Control Using Real-Time Video Analytics and Environmental Sensing},
        journal = {International Journal of Innovative Research in Technology},
        year = {2026},
        volume = {12},
        number = {10},
        pages = {6346-6352},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=194968},
        abstract = {Urban traffic congestion and increasing vehicular emissions have become major challenges in modern cities. Traditional traffic signal systems operate on fixed timing schedules, which fail to adapt to real- time traffic conditions, resulting in delays, fuel wastage, and increased pollution levels.
This paper presents a low-latency intelligent traffic control system based on an Edge-Cloud FPGA architecture. The system integrates an Artix-7 FPGA-based edge board with a Raspberry Pi, along with multiple sensors including ultrasonic sensors, gas sensors, and a cam- era module for real-time monitoring and decision-making.
The FPGA performs high-speed parallel processing of sensor data to dynamically control traffic signals, while the Raspberry Pi utilizes image processing techniques to detect emergency vehicles and prioritize their movement. The ultrasonic sensors ensure pedestrian safety by detecting zebra crossing violations, and the gas sensor continuously monitors carbon monoxide (CO) levels to generate pollution alerts.
By combining edge computing with intelligent sensing and real- time analytics, the proposed system improves traffic flow, enhances safety, reduces environmental impact, and provides a scalable solution for smart city traffic management.},
        keywords = {FPGA, Smart Traffic System, Edge Computing, Image Processing, CO Monitoring, Intelligent Transportation},
        month = {March},
        }

Cite This Article

Poojitha, M., & Akhila, K., & Ganga, N. S., & Rani, K. K. (2026). Low-Latency Edge-Cloud FPGA Architecture for Intelligent Traffic Signal Control Using Real-Time Video Analytics and Environmental Sensing. International Journal of Innovative Research in Technology (IJIRT), 12(10), 6346–6352.

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