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@article{196489,
        author = {Shreepad Purohit and Sureshkumar deora and Tejas patil and Prince Mishra and Dr.Md.Imaduddin},
        title = {Low-Power ECG-on-Chip System Using FPGA and Verilog HDL},
        journal = {International Journal of Innovative Research in Technology},
        year = {2026},
        volume = {12},
        number = {11},
        pages = {5071-5075},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=196489},
        abstract = {Electrocardiogram (ECG) monitoring is essential for diagnosing heart-related diseases; however, conventional ECG machines are bulky and consume high power, making them unsuitable for portable and wearable applications. This work presents a low-power ECG-on-chip system designed using Verilog HDL and implemented on an FPGA platform. The proposed system performs real-time ECG signal processing and extracts vital features such as QRS complexes and heart rate. Leveraging the parallel processing capability and reconfigurability of FPGA technology, the system achieves improved performance and flexibility compared to microcontroller-based approaches. Low-power techniques such as clock gating and optimized resource utilization are applied to reduce energy consumption while maintaining signal accuracy. The proposed ECG-on-chip architecture is suitable for wearable healthcare devices, remote patient monitoring, and portable medical electronics.},
        keywords = {ECG, FPGA, Verilog HDL, QRS Detection, Low Power Design, Biomedical Signal Processing},
        month = {April},
        }