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@article{198854,
        author = {Mrs. B. Swapna and M. Veera Chaithanya and M. Deepika and M. Prabhas and MD. Ammar},
        title = {Design of a Two-Stage Operational Amplifier With Two Gain Stages and a Buffer Stage Using CMOS Process},
        journal = {International Journal of Innovative Research in Technology},
        year = {2026},
        volume = {12},
        number = {11},
        pages = {12344-12352},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=198854},
        abstract = {},
        keywords = {CMOS operational amplifier, two-stage op-amp, Miller compensation, analog VLSI, 180 nm CMOS, Cadence Virtuoso, buffer stage},
        month = {April},
        }