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@article{184274,
        author = {Yashodhare K and Dr. Vijayalakshmi D},
        title = {Power-Efficient FPGA Based CLAHE Image Processing with I3C for Medical Applications},
        journal = {International Journal of Innovative Research in Technology},
        year = {2025},
        volume = {12},
        number = {4},
        pages = {710-714},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=184274},
        abstract = {Image processing is vital in modern embedded system, Applications such surveillance, medical imaging, industrial inspection and autonomous navigation requires image enhancement technique which improves visibility, feature detection and accuracy. This project presents a high-speed pipelined Field programmable gate array (FPGA) architecture for the Contrast Limited Adaptive Histogram Equalization (CLAHE) algorithm which is interfaced with I3C protocol using Block RAM (BRAM) and Verilog HDL for FPGA platforms. Where the system reads image data stored in BRAM, and CLAHE based image processing is performed and enhanced image is stored in output BRAM, an I3C protocol is interface is integrated for allowing external devices or controllers to access the enhanced image data efficiently. Experimental results shows that the image CLAHE algorithm utilizes less power area on selecting ZYNQ (ZCU104) FPGA board on Vivado.},
        keywords = {BRAM, CLAHE, I3C, FPGA, MATLAB.},
        month = {September},
        }