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@article{143959,
        author = {Nagajyothi and P.Sayannna},
        title = {FIR Filter Architecture for Fixed and Reconfigurable Applications},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {3},
        number = {4},
        pages = {350-354},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=143959},
        abstract = {The main objective of the work is to design transpose form Finite Impulse Response (FIR) filters. Which are pipelined and always support Multiple Constant Multiplications (MCM) technique that results in saving of computation. Transpose form of filter configuration does not directly support the block processing method. Transpose form of block FIR filter is depends on the multiplier based architecture for reconfigurable applications. A generalized block formulation is presented for transpose form FIR filter. We have derived a general multiplier-based architecture for the proposed transpose form block filter for reconfigurable applications. A low-complexity design using the MCM scheme is also presented for the block implementation of fixed FIR filters. The proposed structure involves significantly less area delay product (ADP) and less energy per sample (EPS) than the existing block implementation of direct form structure for medium or large filter lengths, while for the short-length filters, the block implementation of direct-form FIR structure has less ADP and less EPS than the proposed structure.},
        keywords = {MCM, transpose form FIR filter, reconfigurable architecture, VLSI},
        month = {},
        }