Copyright © 2025 Authors retain the copyright of this article. This article is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

@article{144472,
        author = {Bukya Balaji},
        title = {Implementationof High-Performance Double-Gate SOI Circuit Design},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {1},
        number = {7},
        pages = {680-683},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=144472},
        abstract = {Double-gate fully-depleted (DGFD) SOI circuits are viewed as the next generation VLSI circuits. This paper investigates the impact of scaling on the demand and challenges of DGFD SOI circuitdesign for low power and high performance.This paper presents the design of a45nm FD-DG SOI MOSFET and studies the impact of versionof channel doping and gate oxide thickness (TOX) on numeroustool parameters. Characteristics for the proposed MOSFEThave been obtained by way of considering most useful values of channeldoping and TOX. Cogenda’s Visual TCAD device has been used forthe device simulation and parameter extraction.},
        keywords = {Circuit design, CMOS, double-gate SOI, high-performance, low-power.
},
        month = {},
        }