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@article{145372,
        author = {S DEEBAN CHAKRAVARTHI and M BALAKUMAR and S AJITHKUMAR and V KARTHIK, A.VELLINGIRI ME},
        title = {FPGA BASED TRAFFIC SIGN DETECTION WITH HIGH RESOLUTION CAMERA},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {4},
        number = {9},
        pages = {387-390},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=145372},
        abstract = {Traffic sign detection plays an important role in a number of practical applications, such as intelligent driver assistance and roadway inventory management. In order to process the large amount of data from either real-time videos or large off-line databases, a high-throughput traffic sign detection system is required. When processing high-definition (1080p) video, it achieves the throughput of 126 frames/s and the energy efficiency of 0.041 J/frame. To efficiently utilize the hardware resources and maximize the detection speed .An FPGA-based accelerator for traffic sign detection using cascade classifiers. In this work, we propose an FPGA-based traffic sign detection based on cascade classifiers. To maximize the throughput and power efficiency.  We propose following ideas 1) rearranged numerical operations;2) shared image storage;
},
        keywords = {},
        month = {},
        }